An optimization tool for radio frequency integrated circuits (RFICs) based on an elitist nondominated sorting genetic algorithm is, introduced. It casts RF circuit synthesis as a multi-objective optimization problem and produces multiple solutions along the Pareto optimal front. Optimization is followed by sensitivity assessment wherein Monte Carlo simulations are performed for the Pareto points with respect to process, voltage, and temperature variations. The tool is validated in the synthesis of a 5.2-GHz direct-conversion receiver front-end that includes a common-gate differential low-noise amplifier, I/Q down-conversion mixers, and a quadrature voltage-controlled oscillator in a 250-nm SiGe BiCMOS process.