Designing an optimized common-mode suppression filter for a bend in a differential trace pair on a printed circuit board involves determining the geometrical parameters that simultaneously provide a large reduction of conversion noise, a small differential mode reflection coefficient and low overall loss, given hardware and manufacturing constraints. Therefore, a novel constrained multiobjective optimization technique is proposed that relies on intermediate surrogate models of the different cost functions instead of numerically expensive full-wave simulations, saving CPU time and memory resources. As a result, a 3-D Pareto-front is created and then constrained based on hardware limitations, depicting the tradeoff between the costs and allowing an easy selection of the most optimal layout geometry.