The parameters of a digital control design need to be rounded if the controller is implemented with finite precision arithmetic. This often results in degradation of the closed loop performance and reduced stability margins. This paper presents a multiobjective genetic algorithm based approach to designing the structure of a finite-precision PID controller implementation to minimize both the performance degradation and the memory requirements of the implementation. The approach provides a set of solutions that are near Pareto-optimal, and so allows the designer to trade-off the performance degradation against the memory requirements. The method is applied to the PID controller structure for the IFAC93 benchmark problem.