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-- Company: 
-- Engineer: 
-- 
-- Create Date: 09/13/2021 05:22:48 PM
-- Design Name: 
-- Module Name: TB_multiplier - Behavioral
-- Project Name: 
-- Target Devices: 
-- Tool Versions: 
-- Description: 
-- 
-- Dependencies: 
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity TB_multiplier is
    Generic (int:Integer:=4; dec:Integer:=28);
--  Port ( );
end TB_multiplier;

architecture Behavioral of TB_multiplier is

signal A,B,S : std_logic_vector (Int+dec downto 0);

begin

UUT: entity work.multiplier_fp
    generic map (int,dec)
    port map ( A => A,
               B => B,
               S => S);
             
Stimulus : process
begin
    A <= '0' & X"4" & X"8000000";
    B <= '0' & X"1" & X"8000000";
    wait for 10 ns;
    A <= '1' & X"B" & X"8000000";
    B <= '1' & X"E" & X"8000000";
    wait for 10 ns;
    A <= '1' & X"B" & X"8000000";
    B <= '0' & X"1" & X"8000000";

    wait;
end process;


             
end Behavioral;